CVE-2024-30212
- Source
- https://nvd.nist.gov/vuln/detail/CVE-2024-30212
- Import Source
- https://storage.googleapis.com/cve-osv-conversion/osv-output/CVE-2024-30212.json
- JSON Data
- https://api.osv.dev/v1/vulns/CVE-2024-30212
- Published
- 2024-05-28T16:15:15Z
- Modified
- 2025-01-15T05:12:49.484914Z
- Summary
- [none]
- Details
-
If a SCSI READ(10) command is initiated via USB using the largest LBA (0xFFFFFFFF) with it's default block size of 512 and a count of 1,
the first 512 byte of the 0x80000000 memory area is returned to the user. If the block count is increased, the full RAM can be exposed.
The same method works to write to this memory area. If RAM contains pointers, those can be - depending on the application - overwritten to
return data from any other offset including Progam and Boot Flash.
- References
Affected packages
Git / github.com/microchip-mplab-harmony/core
Affected ranges
- Type
- GIT
- Repo
- https://github.com/microchip-mplab-harmony/core
- Events
-
Introduced0 Unknown introduced commit / All previous commits are affectedFixedFixed
Affected versions
Other
H3_alpha
v3.*
v3.0.0
v3.0.0-rc.1
v3.0.0-rc.2
v3.1.0
v3.1.0-rc.1
v3.1.1
v3.10.0
v3.10.0-rc.1
v3.10.0-rc.2
v3.10.0-rc.3
v3.10.1
v3.11.0
v3.11.0-rc.1
v3.11.1
v3.12.0
v3.12.0-E1
v3.13.0
v3.13.0-rc.1
v3.13.1
v3.13.2
v3.13.2-rc.1
v3.13.3
v3.2.0
v3.2.0-rc.1
v3.2.0-rc.2
v3.2.1
v3.3.0
v3.3.0-rc.1
v3.3.0-rc.2
v3.3.0-rc.3
v3.3.0-rc.4
v3.4.0
v3.4.0-rc.1
v3.4.0-rc.2
v3.5.0
v3.5.0-rc.1
v3.5.0-rc.2
v3.5.1
v3.5.2
v3.6.0
v3.6.0-alpha
v3.6.0-rc.1
v3.6.0-rc.2
v3.6.0-rc.3
v3.6.0-rc.4
v3.6.1
v3.7.0
v3.7.0-rc.1
v3.7.0-rc.2
v3.7.1
v3.7.2
v3.8.0
v3.8.0-rc.1
v3.8.0-rc.2
v3.8.0-rc.3
v3.8.0-rc.4
v3.8.0-tc.1
v3.8.1
v3.9.0
v3.9.0-rc.1
v3.9.0-rc.2
v3.9.1
v3.9.1-rc.1
v3.9.1-rc.2
v3.9.2