CVE-2026-50185

Source
https://cve.org/CVERecord?id=CVE-2026-50185
Import Source
https://storage.googleapis.com/cve-osv-conversion/osv-output/CVE-2026-50185.json
JSON Data
https://api.osv.dev/v1/vulns/CVE-2026-50185
Aliases
Downstream
Related
Published
2026-07-17T18:35:02.078Z
Modified
2026-08-20T03:54:24.708419814Z
Severity
  • 2.0 (Low) CVSS_V4 - CVSS:4.0/AV:L/AC:L/AT:P/PR:L/UI:N/VC:N/VI:L/VA:N/SC:N/SI:N/SA:N CVSS Calculator
Summary
RustCrypto Cmov/CmovEq on aarch64 can produce wrong results if high-bits of registers are set
Details

RustCrypto CMOV provides conditional move CPU intrinsics which are guaranteed on major platforms to execute in constant-time and not be rewritten as branches by the compiler. From 0.1.1 until 0.5.4, the aarch64 implementations of Cmov and CmovEq in cmov/src/backends/aarch64.rs assume high bits are zero-extended when loading values smaller than a register, so set high bits such as [8..] in a Cmov selector or [16..] of self or other in the u16 and i16 CmovEq implementations can cause left.cmovz(&right, condition) to produce incorrect output. This issue is fixed in version 0.5.4.

Database specific
{
    "osv_generated_from": "https://github.com/CVEProject/cvelistV5/tree/main/cves/2026/50xxx/CVE-2026-50185.json",
    "cna_assigner": "GitHub_M",
    "cwe_ids": [
        "CWE-758"
    ]
}
References

Affected packages

Git / github.com/rustcrypto/utils

Affected ranges

Type
GIT
Repo
https://github.com/rustcrypto/utils
Events
Database specific
Show details
{
    "source": [
        "CPE_RANGE",
        "REFERENCES"
    ],
    "cpe": "cpe:2.3:a:rustcrypto:cmov:*:*:*:*:*:rust:*:*",
    "extracted_events": [
        {
            "introduced": "0.1.1"
        },
        {
            "fixed": "0.5.4"
        }
    ]
}

Database specific

source
"https://storage.googleapis.com/cve-osv-conversion/osv-output/CVE-2026-50185.json"