OESA-2026-3408

Source
https://www.openeuler.org/en/security/security-bulletins/detail/?id=openEuler-SA-2026-3408
Import Source
https://repo.openeuler.org/security/data/osv/OESA-2026-3408.json
JSON Data
https://api.osv.dev/v1/vulns/OESA-2026-3408
Upstream
  • CVE-2025-31936
  • CVE-2025-31938
  • CVE-2025-35973
  • CVE-2026-20707
  • CVE-2026-20713
  • CVE-2026-20716
  • CVE-2026-20760
  • CVE-2026-20901
  • CVE-2026-20917
Published
2026-08-20T09:54:43Z
Modified
2026-08-20T10:15:06Z
Severity
  • 7.2 (High) CVSS_V4 - CVSS:4.0/AV:L/AC:H/AT:P/PR:L/UI:N/VC:H/VI:H/VA:N/SC:N/SI:N/SA:N CVSS Calculator
Summary
microcode_ctl security update
Details

This is a tool to transform and deploy microcode update for x86 CPUs.

Security Fix(es):

Improper handling of overlap between protected memory ranges for some Intel(R) Xeon(R) 6 processors when using Intel(R) TDX within SMM may allow an escalation of privilege. SMM adversary with a privileged user combined with a high complexity attack may enable escalation of privilege. This result may potentially occur via local access when attack requirements are present with special internal knowledge and requires no user interaction. The potential vulnerability may impact the confidentiality (high), integrity (high) and availability (none) of the vulnerable system, resulting in subsequent system confidentiality (none), integrity (none) and availability (none) impacts.(CVE-2025-31936)

Insufficient granularity of access control in some subsystem for some Intel(R) Xeon(R) 6 Scalable processors with Intel(R) TDX may allow an information disclosure. Authorized adversary with an authenticated user combined with a high complexity attack may enable data exposure. This result may potentially occur via local access when attack requirements are present with special internal knowledge and requires no user interaction. The potential vulnerability may impact the confidentiality (none), integrity (none) and availability (none) of the vulnerable system, resulting in subsequent system confidentiality (high), integrity (none) and availability (none) impacts.(CVE-2025-31938)

Improper handling of values for some Intel(R) Processors within Ring 0: Kernel, Hypervisor and Bare Metal OS may allow an escalation of privilege. Authorized adversary with a privileged user combined with a high complexity attack may enable escalation of privilege. This result may potentially occur via local access when attack requirements are present with special internal knowledge and require no user interaction. The potential vulnerability may impact the confidentiality (low), integrity (low) and availability (none) of the vulnerable system, resulting in subsequent system confidentiality (high), integrity (high) and availability (none) impacts.(CVE-2025-35973)

Hardware logic contains race conditions for some 3rd Gen Intel(R) Xeon(R) Scalable Processors within Ring 3: unprivileged software may allow a denial of service. Unprivileged software adversary with an authenticated user combined with a high complexity attack may enable denial of service. This result may potentially occur via local access when attack requirements are not present with special internal knowledge and requires no user interaction. The potential vulnerability may impact the confidentiality (none), integrity (none) and availability (high) of the vulnerable system, resulting in subsequent system confidentiality (none), integrity (none) and availability (high) impacts.(CVE-2026-20707)

Always-incorrect control flow implementation in some firmware for some Intel(R) Xeon(R) processors may allow an escalation of privilege. System software adversary with a privileged user combined with a high complexity attack may enable escalation of privilege. This result may potentially occur via local access when attack requirements are not present without special internal knowledge and requires no user interaction. The potential vulnerability may impact the confidentiality (none), integrity (none) and availability (none) of the vulnerable system, resulting in subsequent system confidentiality (high), integrity (high) and availability (none) impacts.(CVE-2026-20713)

Improper access control for some Intel(R) Processors within Ring 3: User Applications may allow an escalation of privilege. Simple hardware adversary with an authenticated user combined with a high complexity attack may enable escalation of privilege. This result may potentially occur via local access when attack requirements are present with special internal knowledge and requires no user interaction. The potential vulnerability may impact the confidentiality (high), integrity (high) and availability (none) of the vulnerable system, resulting in subsequent system confidentiality (none), integrity (none) and availability (none) impacts.(CVE-2026-20716)

Improper handling of overlap between protected memory ranges in some microcode for some Intel(R) Processors within Ring 0: Hypervisor may allow an escalation of privilege. Authorized adversary with a privileged user combined with a low complexity attack may enable escalation of privilege. This result may potentially occur via local access when attack requirements are not present without special internal knowledge and requires no user interaction. The potential vulnerability may impact the confidentiality (high), integrity (high) and availability (high) of the vulnerable system, resulting in subsequent system confidentiality (none), integrity (none) and availability (none) impacts.(CVE-2026-20760)

Improper input validation for some Intel(R) Xeon(R) processors within firmware may allow an escalation of privilege. Startup code and smm adversary with a privileged user combined with a high complexity attack may enable data alteration. This result may potentially occur via local access when attack requirements are present without special internal knowledge and requires no user interaction. The potential vulnerability may impact the confidentiality (none), integrity (none) and availability (none) of the vulnerable system, resulting in subsequent system confidentiality (none), integrity (high) and availability (none) impacts.(CVE-2026-20901)

Exposure of sensitive information caused by incorrect data forwarding during transient execution for some Intel(R) Processors within Ring 0: Hypervisor and Kernel may allow information disclosure. System software adversary with a privileged user combined with a high complexity attack may enable data exposure. This result may potentially occur via local access when attack requirements are not present without special internal knowledge and requires no user interaction. The potential vulnerability may impact the confidentiality (none), integrity (none) and availability (none) of the vulnerable system, resulting in subsequent system confidentiality (high), integrity (none) and availability (none) impacts.(CVE-2026-20917)

Database specific
{
    "severity": "High"
}
References

Affected packages

openEuler:20.03-LTS-SP4
microcode_ctl

Package

Name
microcode_ctl
Purl
pkg:rpm/openEuler/microcode_ctl&distro=openEuler-20.03-LTS-SP4

Affected ranges

Type
ECOSYSTEM
Events
Introduced
0 Unknown introduced version / All previous versions are affected
Fixed
20260811-1.oe2003sp4

Ecosystem specific

{
    "src": [
        "microcode_ctl-20260811-1.oe2003sp4.src.rpm"
    ],
    "x86_64": [
        "microcode_ctl-20260811-1.oe2003sp4.x86_64.rpm"
    ]
}

Database specific

source
"https://repo.openeuler.org/security/data/osv/OESA-2026-3408.json"
openEuler:22.03-LTS-SP4
microcode_ctl

Package

Name
microcode_ctl
Purl
pkg:rpm/openEuler/microcode_ctl&distro=openEuler-22.03-LTS-SP4

Affected ranges

Type
ECOSYSTEM
Events
Introduced
0 Unknown introduced version / All previous versions are affected
Fixed
20260811-1.oe2203sp4

Ecosystem specific

{
    "src": [
        "microcode_ctl-20260811-1.oe2203sp4.src.rpm"
    ],
    "x86_64": [
        "microcode_ctl-20260811-1.oe2203sp4.x86_64.rpm"
    ]
}

Database specific

source
"https://repo.openeuler.org/security/data/osv/OESA-2026-3408.json"
openEuler:24.03-LTS-SP1
microcode_ctl

Package

Name
microcode_ctl
Purl
pkg:rpm/openEuler/microcode_ctl&distro=openEuler-24.03-LTS-SP1

Affected ranges

Type
ECOSYSTEM
Events
Introduced
0 Unknown introduced version / All previous versions are affected
Fixed
20260811-1.oe2403sp1

Ecosystem specific

{
    "src": [
        "microcode_ctl-20260811-1.oe2403sp1.src.rpm"
    ],
    "x86_64": [
        "microcode_ctl-20260811-1.oe2403sp1.x86_64.rpm"
    ]
}

Database specific

source
"https://repo.openeuler.org/security/data/osv/OESA-2026-3408.json"
openEuler:24.03-LTS-SP3
microcode_ctl

Package

Name
microcode_ctl
Purl
pkg:rpm/openEuler/microcode_ctl&distro=openEuler-24.03-LTS-SP3

Affected ranges

Type
ECOSYSTEM
Events
Introduced
0 Unknown introduced version / All previous versions are affected
Fixed
20260811-1.oe2403sp3

Ecosystem specific

{
    "src": [
        "microcode_ctl-20260811-1.oe2403sp3.src.rpm"
    ],
    "x86_64": [
        "microcode_ctl-20260811-1.oe2403sp3.x86_64.rpm"
    ]
}

Database specific

source
"https://repo.openeuler.org/security/data/osv/OESA-2026-3408.json"
openEuler:24.03-LTS-SP4
microcode_ctl

Package

Name
microcode_ctl
Purl
pkg:rpm/openEuler/microcode_ctl&distro=openEuler-24.03-LTS-SP4

Affected ranges

Type
ECOSYSTEM
Events
Introduced
0 Unknown introduced version / All previous versions are affected
Fixed
20260811-1.oe2403sp4

Ecosystem specific

{
    "src": [
        "microcode_ctl-20260811-1.oe2403sp4.src.rpm"
    ],
    "x86_64": [
        "microcode_ctl-20260811-1.oe2403sp4.x86_64.rpm"
    ]
}

Database specific

source
"https://repo.openeuler.org/security/data/osv/OESA-2026-3408.json"