GNU binutil was updated to the 2.29.1 release, bringing various new features, fixing a lot of bugs and security issues.
Update to binutils 2.29. [fate#321454, fate#321494, fate#323293]:
- The MIPS port now supports microMIPS eXtended Physical Addressing (XPA)
instructions for assembly and disassembly.
- The MIPS port now supports the microMIPS Release 5 ISA for assembly and
disassembly.
- The MIPS port now supports the Imagination interAptiv MR2 processor,
which implements the MIPS32r3 ISA, the MIPS16e2 ASE as well as a couple
of implementation-specific regular MIPS and MIPS16e2 ASE instructions.
- The SPARC port now supports the SPARC M8 processor, which implements the
Oracle SPARC Architecture 2017.
- The MIPS port now supports the MIPS16e2 ASE for assembly and disassembly.
- Add support for ELF SHFGNUMBIND and PTGNUMBIND_XXX.
- Add support for the wasm32 ELF conversion of the WebAssembly file format.
- Add --inlines option to objdump, which extends the --line-numbers option
so that inlined functions will display their nesting information.
- Add --merge-notes options to objcopy to reduce the size of notes in
a binary file by merging and deleting redundant notes.
Add support for locating separate debug info files using the build-id
method, where the separate file has a name based upon the build-id of
the original file.
Add support for ELF SHFGNUMBIND.
- Add support for the WebAssembly file format and wasm32 ELF conversion.
- PowerPC gas now checks that the correct register class is used in
instructions. For instance, 'addi %f4,%cr3,%r31' warns three times
that the registers are invalid.
- Add support for the Texas Instruments PRU processor.
Support for the ARMv8-R architecture and Cortex-R52 processor has been
added to the ARM port.
Support for -z shstk in the x86 ELF linker to generate
GNUPROPERTYX86FEATURE1_SHSTK in ELF GNU program properties.
- Add support for GNUPROPERTYX86FEATURE1_SHSTK in ELF GNU program
properties in the x86 ELF linker.
- Add support for GNUPROPERTYX86FEATURE1_IBT in ELF GNU program
properties in the x86 ELF linker.
- Support for -z ibtplt in the x86 ELF linker to generate IBT-enabled
PLT.
- Support for -z ibt in the x86 ELF linker to generate IBT-enabled
PLT as well as GNUPROPERTYX86FEATURE1_IBT in ELF GNU program
properties.
- Add support for ELF SHFGNUMBIND and PTGNUMBIND_XXX.
- Add support for ELF GNU program properties.
- Add support for the Texas Instruments PRU processor.
- When configuring for arc--linux* targets the default linker emulation will
change if --with-cpu=nps400 is used at configure time.
- Improve assignment of LMAs to orphan sections in some edge cases where a
mixture of both AT>LMA_REGION and AT(LMA) are used.
- Orphan sections placed after an empty section that has an AT(LMA) will now
take an load memory address starting from LMA.
Section groups can now be resolved (the group deleted and the group members
placed like normal sections) at partial link time either using the new
linker option --force-group-allocation or by placing FORCEGROUPALLOCATION
into the linker script.
- Add riscv64 target, tested with gcc7 and downstream newlib 2.4.0
- Prepare riscv32 target (gh#riscv/riscv-newlib#8)
- Make compressed debug section handling explicit, disable for
old products and enable for gas on all architectures otherwise. [bsc#1029995]
- Remove empty rpath component removal optimization from to workaround
CMake rpath handling. [bsc#1025282]
Minor security bugs fixed:
PR 21147, PR 21148, PR 21149, PR 21150, PR 21151, PR 21155, PR 21158, PR 21159
Add support for locating separate debug info files using the build-id
method, where the separate file has a name based upon the build-id of
the original file.
- This version of binutils fixes a problem with PowerPC VLE 16A and 16D
relocations which were functionally swapped, for example,
RPPCVLEHA16A performed like RPPCVLEHA16D while RPPCVLEHA16D
performed like RPPCVLEHA16A. This could have been fixed by
renumbering relocations, which would keep object files created by an
older version of gas compatible with a newer ld. However, that would
require an ABI update, affecting other assemblers and linkers that
create and process the relocations correctly. It is recommended that
all VLE object files be recompiled, but ld can modify the relocations
if --vle-reloc-fixup is passed to ld. If the new ld command line
option is not used, ld will ld warn on finding relocations inconsistent
with the instructions being relocated.
- The nm program has a new command line option (--with-version-strings)
which will display a symbol's version information, if any, after the
symbol's name.
- The ARC port of objdump now accepts a -M option to specify the extra
instruction class(es) that should be disassembled.
- The --remove-section option for objcopy and strip now accepts section
patterns starting with an exclamation point to indicate a non-matching
section. A non-matching section is removed from the set of sections
matched by an earlier --remove-section pattern.
- The --only-section option for objcopy now accepts section patterns
starting with an exclamation point to indicate a non-matching section.
A non-matching section is removed from the set of sections matched by
an earlier --only-section pattern.
New --remove-relocations=SECTIONPATTERN option for objcopy and strip.
This option can be used to remove sections containing relocations.
The SECTIONPATTERN is the section to which the relocations apply, not
the relocation section itself.
Add support for the RISC-V architecture.
Add support for the ARM Cortex-M23 and Cortex-M33 processors.
The EXCLUDE_FILE linker script construct can now be applied outside of the
section list in order for the exclusions to apply over all input sections
in the list.
- Add support for the RISC-V architecture.
- The command line option --no-eh-frame-hdr can now be used in ELF based
linkers to disable the automatic generation of .ehframehdr sections.
- Add --in-implib=<infile> to the ARM linker to enable specifying a set of
Secure Gateway veneers that must exist in the output import library
specified by --out-implib=<outfile> and the address they must have.
As such, --in-implib is only supported in combination with --cmse-implib.
Extended the --out-implib=<file> option, previously restricted to x86 PE
targets, to any ELF based target. This allows the generation of an import
library for an ELF executable, which can then be used by another application
to link against the executable.
Add -z bndplt option (x86-64 only) to support Intel MPX.
- Add --orphan-handling option.
- Add --stub-group-multi option (PowerPC only).
- Add --target1-rel, --target1-abs, --target2 options (Arm only).
- Add -z stack-size option.
- Add --be8 option (Arm only).
- Add HIDDEN support in linker scripts.
Add SORTBYINIT_PRIORITY support in linker scripts.
Fix section alignment on .gnu_debuglink. [bso#21193]
- Add s390x to gold_archs.
- Fix alignment frags for aarch64 (bsc#1003846)
- Call ldconfig for libbfd
- Fix an assembler problem with clang on ARM.
Restore monotonically increasing section offsets.
Add a configure option, --enable-64-bit-archive, to force use of a
64-bit format when creating an archive symbol index.
Add --elf-stt-common= option to objcopy for ELF targets to control
whether to convert common symbols to the STT_COMMON type.
Default to --enable-compressed-debug-sections=gas for Linux/x86 targets.
- Add --no-pad-sections to stop the assembler from padding the end of output
sections up to their alignment boundary.
- Support for the ARMv8-M architecture has been added to the ARM port.
Support for the ARMv8-M Security and DSP Extensions has also been added
to the ARM port.
- ARC backend accepts .extInstruction, .extCondCode, .extAuxRegister, and
.extCoreRegister pseudo-ops that allow an user to define custom
instructions, conditional codes, auxiliary and core registers.
- Add a configure option --enable-elf-stt-common to decide whether ELF
assembler should generate common symbols with the STT_COMMON type by
default. Default to no.
- New command line option --elf-stt-common= for ELF targets to control
whether to generate common symbols with the STT_COMMON type.
- Add ability to set section flags and types via numeric values for ELF
based targets.
- Add a configure option --enable-x86-relax-relocations to decide whether
x86 assembler should generate relax relocations by default. Default to
yes, except for x86 Solaris targets older than Solaris 12.
- New command line option -mrelax-relocations= for x86 target to control
whether to generate relax relocations.
- New command line option -mfence-as-lock-add=yes for x86 target to encode
lfence, mfence and sfence as 'lock addl $0x0, (%[re]sp)'.
- Add assembly-time relaxation option for ARC cpus.
Add --with-cpu=TYPE configure option for ARC gas. This allows the default
cpu type to be adjusted at configure time.
Add a configure option --enable-relro to decide whether -z relro should
be enabled by default. Default to yes.
- Add support for s390, MIPS, AArch64, and TILE-Gx architectures.
- Add support for STTGNUIFUNC symbols.
Add support for incremental linking (--incremental).
Add a configure option --enable-relro to decide whether -z relro should
be enabled in ELF linker by default. Default to yes for all Linux
targets except FRV, HPPA, IA64 and MIPS.
- Support for -z noreloc-overflow in the x86-64 ELF linker to disable
relocation overflow check.
- Add -z common/-z nocommon options for ELF targets to control whether to
convert common symbols to the STT_COMMON type during a relocatable link.
- Support for -z nodynamic-undefined-weak in the x86 ELF linker, which
avoids dynamic relocations against undefined weak symbols in executable.
- The NOCROSSREFSTO command was added to the linker script language.
- Add --no-apply-dynamic-relocs to the AArch64 linker to do not apply
link-time values for dynamic relocations.